Freescale Semiconductor /MKL24Z4 /SIM /SOPT2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SOPT2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)RTCCLKOUTSEL 0CLKOUTSEL 0 (0)PLLFLLSEL 0 (0)USBSRC 0 (00)TPMSRC 0 (00)UART0SRC

TPMSRC=00, USBSRC=0, RTCCLKOUTSEL=0, UART0SRC=00, PLLFLLSEL=0

Description

System Options Register 2

Fields

RTCCLKOUTSEL

RTC clock out select

0 (0): RTC 1 Hz clock is output on the RTC_CLKOUT pin.

1 (1): OSCERCLK clock is output on the RTC_CLKOUT pin.

CLKOUTSEL

CLKOUT select

2 (010): Bus clock

3 (011): LPO clock (1 kHz)

4 (100): MCGIRCLK

6 (110): OSCERCLK

PLLFLLSEL

PLL/FLL clock select

0 (0): MCGFLLCLK clock

1 (1): MCGPLLCLK clock with fixed divide by two

USBSRC

USB clock source select

0 (0): External bypass clock (USB_CLKIN).

1 (1): MCGPLLCLK/2 or MCGFLLCLK clock

TPMSRC

TPM clock source select

0 (00): Clock disabled

1 (01): MCGFLLCLK clock or MCGPLLCLK/2

2 (10): OSCERCLK clock

3 (11): MCGIRCLK clock

UART0SRC

UART0 clock source select

0 (00): Clock disabled

1 (01): MCGFLLCLK clock or MCGPLLCLK/2 clock

2 (10): OSCERCLK clock

3 (11): MCGIRCLK clock

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